[all-commits] [llvm/llvm-project] fd43d9: [RISCV] Pre-process FP SPLAT_VECTOR to RISCVISD::V...

[Fraser Cormack via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fd43d99c93fc5b1f47686ce852e02b77119434b1
      https://github.com/llvm/llvm-project/commit/fd43d99c93fc5b1f47686ce852e02b77119434b1
  Author: Fraser Cormack <fraser at codeplay.com>
  Date:   2022-02-10 (Thu, 10 Feb 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrsub-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll

  Log Message:
  -----------
  [RISCV] Pre-process FP SPLAT_VECTOR to RISCVISD::VFMV_V_F_VL

This patch builds on top of D119197 to canonicalize floating-point
SPLAT_VECTOR as RISCVISD::VFMV_V_F_VL as a pre-process ISel step.

This primarily benefits scalable-vector VP code, where our VP patterns
only match VFMV_V_F_VL to reduce the burden on our ISel patterns, but
where at the same time, scalable-vector code doesn't custom-legalize
SPLAT_VECTOR.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117670