[all-commits] [llvm/llvm-project] c45c1b: [RISCV] Teach RISCVDAGToDAGISel::selectShiftMask t...
Craig Topper via All-commits
all-commits at lists.llvm.org
Wed Feb 9 12:37:07 PST 2022
Author: Craig Topper <craig.topper at sifive.com>
Date: 2022-02-09 (Wed, 09 Feb 2022)
[RISCV] Teach RISCVDAGToDAGISel::selectShiftMask to replace sub from constant with neg.
If the shift amount is (sub C, X) where C is 0 modulo the size of
the shift, we can replace it with neg or negw.
Similar is is done for AArch64 and X86.
Reviewed By: khchen
Differential Revision: https://reviews.llvm.org/D119089
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