[all-commits] [llvm/llvm-project] 79b3fe: [InstCombine] SimplifyDemandedBits - mul(x, x) is o...

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 79b3fe80707b2eb9a38c1517a829fb58062fb687
      https://github.com/llvm/llvm-project/commit/79b3fe80707b2eb9a38c1517a829fb58062fb687
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-02-07 (Mon, 07 Feb 2022)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Transforms/InstCombine/mul-masked-bits.ll

  Log Message:
  -----------
  [InstCombine] SimplifyDemandedBits - mul(x,x) is odd iff x is odd

https://alive2.llvm.org/ce/z/AXPr3k