[all-commits] [llvm/llvm-project] b3b129: [DAGCombiner][AArch64] Enhance to support for scal...

[Allen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b3b129f11f3c09f1f6b43fc9ddf55abdbe98271c
      https://github.com/llvm/llvm-project/commit/b3b129f11f3c09f1f6b43fc9ddf55abdbe98271c
  Author: zhongyunde 00443407 <zhongyunde at huawei.com>
  Date:   2022-02-07 (Mon, 07 Feb 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/aarch64-isel-csinc-type.ll
    M llvm/test/CodeGen/AArch64/aarch64-isel-csinc.ll
    M llvm/test/CodeGen/AArch64/arm64-csel.ll

  Log Message:
  -----------
  [DAGCombiner][AArch64] Enhance to support for scalar CSINC

Enhance to fold csel into csinc instruction.
Fix https://github.com/llvm/llvm-project/issues/53071

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D116915