[all-commits] [llvm/llvm-project] 537216: [InstCombine] SimplifyDemandedBits - mul(x, x) - if...

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5372160a188e3e0e84d09ba6a8353e39daefe4a0
      https://github.com/llvm/llvm-project/commit/5372160a188e3e0e84d09ba6a8353e39daefe4a0
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-02-05 (Sat, 05 Feb 2022)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Transforms/InstCombine/mul-masked-bits.ll

  Log Message:
  -----------
  [InstCombine] SimplifyDemandedBits - mul(x,x) - if only demand bit[1] then fold to zero

This is a translation of the fold added to codegen with:
2d1390efbe61

Part of solving issue #48027