[all-commits] [llvm/llvm-project] 91e8a6: [mlir] Support verification order (1/3)

[ChiaHungDuan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 91e8a63c20ea5a040de89143944e842c4d422b68
      https://github.com/llvm/llvm-project/commit/91e8a63c20ea5a040de89143944e842c4d422b68
  Author: Chia-hung Duan <chiahungduan at google.com>
  Date:   2022-02-02 (Wed, 02 Feb 2022)

  Changed paths:
    M mlir/include/mlir/IR/OpBase.td
    M mlir/lib/TableGen/Operator.cpp
    M mlir/test/mlir-tblgen/op-error.td

  Log Message:
  -----------
  [mlir] Support verification order (1/3)

This CL supports adding dependency between traits verifiers and the
dependency will be checked statically.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D115135