[all-commits] [llvm/llvm-project] 6592bc: [x86] invert a vector select IR canonicalization w...

Sanjay Patel via All-commits all-commits at lists.llvm.org
Wed Feb 2 05:18:08 PST 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6592bcecd4ffc03f72d23f81bcb8d51f8ebeb07d
      https://github.com/llvm/llvm-project/commit/6592bcecd4ffc03f72d23f81bcb8d51f8ebeb07d
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-02-02 (Wed, 02 Feb 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512fp16-arith-intrinsics.ll
    M llvm/test/CodeGen/X86/vector-bo-select.ll

  Log Message:
  -----------
  [x86] invert a vector select IR canonicalization with a binop identity constant

This is an intentionally limited/different form of D90113.
That patch bravely tries to generalize folds where we pull
a binop into the arms of a select:
N0 + (Cond ? 0 : FVal) --> Cond ? N0 : (N0 + FVal)
...but it is not universally profitable.

This is the inverse of IR canonicalization as discussed in
D113442.

We know that this transform is not entirely profitable even
within x86, so we only handle x86 vector fadd/fsub as a 1st
step. The intent is to prevent AVX512 regressions as mentioned
in D113442.

The plan is to port this to DAGCombiner (so it will eventually
look more like D90113) and add more types/cases in pieces with
many more tests to verify that we are seeing improvements.

Differential Revision: https://reviews.llvm.org/D118644




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