[all-commits] [llvm/llvm-project] dc8254: [mlir][vector] Make write permutation lowering wor...

[Tobias Gysi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dc82547b173ffed79c87e57339540baed096410f
      https://github.com/llvm/llvm-project/commit/dc82547b173ffed79c87e57339540baed096410f
  Author: gysit <gysit at google.com>
  Date:   2022-02-02 (Wed, 02 Feb 2022)

  Changed paths:
    M mlir/lib/Dialect/Vector/Transforms/VectorTransferPermutationMapRewritePatterns.cpp
    M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir

  Log Message:
  -----------
  [mlir][vector] Make write permutation lowering work with tensors.

Use type inference when building the TransferWriteOp in the TransferWritePermutationLowering. Previously, the result type has been set to Type() which triggers an assertion if the pattern is used with tensors instead of memrefs.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D118758