[all-commits] [llvm/llvm-project] c2b18a: [AMDGPU] Allow scalar loads after barrier

Stanislav Mekhanoshin via All-commits all-commits at lists.llvm.org
Tue Feb 1 11:43:36 PST 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c2b18a3cc5bd6cae49372c2367445b480989db0d
      https://github.com/llvm/llvm-project/commit/c2b18a3cc5bd6cae49372c2367445b480989db0d
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2022-02-01 (Tue, 01 Feb 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
    A llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll

  Log Message:
  -----------
  [AMDGPU] Allow scalar loads after barrier

Currently we cannot convert a vector load into scalar if there
is dominating barrier or fence. It is considered a clobbering
memory access to prevent memory operations reordering. While
reordering is not possible the actual memory is not being clobbered
by a barrier or fence and we can still use a scalar load for a
uniform pointer.

The solution is not to bail on a first clobbering access but
traverse MemorySSA to the root excluding barriers and fences.

Differential Revision: https://reviews.llvm.org/D118419




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