[all-commits] [llvm/llvm-project] 20875f: [RISCV] Make Zfhmin in march imply F.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 20875fe8a5b18b403a6b1a54b6e15afec3694c77
      https://github.com/llvm/llvm-project/commit/20875fe8a5b18b403a6b1a54b6e15afec3694c77
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-31 (Mon, 31 Jan 2022)

  Changed paths:
    M clang/test/Preprocessor/riscv-target-features.c
    M llvm/lib/Support/RISCVISAInfo.cpp

  Log Message:
  -----------
  [RISCV] Make Zfhmin in march imply F.

Zfhmin should imply F just like Zfh.

Reviewed By: achieveartificialintelligence

Differential Revision: https://reviews.llvm.org/D118578


  Commit: aae947e860d4f7cd35b3d3eac76c7382423fbb62
      https://github.com/llvm/llvm-project/commit/aae947e860d4f7cd35b3d3eac76c7382423fbb62
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-31 (Mon, 31 Jan 2022)

  Changed paths:
    M llvm/lib/Support/RISCVISAInfo.cpp
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
    M llvm/test/CodeGen/RISCV/attributes.ll
    M llvm/test/MC/RISCV/attribute-arch.s
    M llvm/test/MC/RISCV/rv32i-invalid.s

  Log Message:
  -----------
  [RISCV] Separate the Zfhmin and Zfh extensions.

The spec doesn't seem to be written as if Zfh implies Zfhmin. They
seem to be separate extensions.

This patch moves the instructions from Zfhmin to be enabled with
either the Zfh or Zfhmin extensions.

Reviewed By: achieveartificialintelligence

Differential Revision: https://reviews.llvm.org/D118581


Compare: https://github.com/llvm/llvm-project/compare/ddac11aee649...aae947e860d4