[all-commits] [llvm/llvm-project] e10751: [RISCV] Custom lower brev8 intrinsic to RISCVISD::...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e1075186a6458de75492f5de5fb8b8139097ff5f
      https://github.com/llvm/llvm-project/commit/e1075186a6458de75492f5de5fb8b8139097ff5f
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-30 (Sun, 30 Jan 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/test/CodeGen/RISCV/rv32zbkb-intrinsic.ll
    M llvm/test/CodeGen/RISCV/rv64zbkb-intrinsic.ll

  Log Message:
  -----------
  [RISCV] Custom lower brev8 intrinsic to RISCVISD::GREV.

We can use the RISCVISD::GREV encoding that swaps the bits in
each byte.  This allows it to use the existing computeKnownBits
support for RISCVISD::GREV.