[all-commits] [llvm/llvm-project] ea05ee: [RISCV] Preserve VL when truncating i64 gather/sca...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ea05ee90596ceaa361950f818980d4997e4437b9
      https://github.com/llvm/llvm-project/commit/ea05ee90596ceaa361950f818980d4997e4437b9
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-28 (Fri, 28 Jan 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
    M llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll

  Log Message:
  -----------
  [RISCV] Preserve VL when truncating i64 gather/scatter indices on RV32.

We were creating a truncate with the default for the type, but for
VP intrinsics we have a VL that we should use.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D118406