[all-commits] [llvm/llvm-project] 49178a: [SVE] Extend isel pattern coverage for BIC.

[paulwalker-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 49178a2c4ee3f44b85d99c3730a7e71e2caf554a
      https://github.com/llvm/llvm-project/commit/49178a2c4ee3f44b85d99c3730a7e71e2caf554a
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2022-01-28 (Fri, 28 Jan 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    M llvm/test/CodeGen/AArch64/llvm-ir-to-intrinsic.ll
    M llvm/test/CodeGen/AArch64/sve-int-log.ll

  Log Message:
  -----------
  [SVE] Extend isel pattern coverage for BIC.

Adds patterns of the form "(and a, (not b)) -> bic".

NOTE: With this support I'm inclined to remove AArch64ISD::BIC,
but will leave that investigation for another time.

Differential Revision: https://reviews.llvm.org/D118365