[all-commits] [llvm/llvm-project] ccda0f: [X86][SSE] Add combineBitOpWithShift for BITOP(SHI...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ccda0f22263f1cf97657e8235ae694a2e7d8526c
      https://github.com/llvm/llvm-project/commit/ccda0f22263f1cf97657e8235ae694a2e7d8526c
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-01-27 (Thu, 27 Jan 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/movmsk-cmp.ll
    M llvm/test/CodeGen/X86/vector-ext-logic.ll

  Log Message:
  -----------
  [X86][SSE] Add combineBitOpWithShift for BITOP(SHIFT(X,Z),SHIFT(Y,Z)) -> SHIFT(BITOP(X,Y),Z) vector folds

InstCombine performs this more generally with SimplifyUsingDistributiveLaws, but we don't need anything that complex here - this is mainly to fix up cases where logic ops get created late on during lowering, often in conjunction with sext/zext ops for type legalization.

https://alive2.llvm.org/ce/z/gGpY5v