[all-commits] [llvm/llvm-project] d58757: [AArch64][SVE] Implement PFALSE with explicit AArc...

[sdesmalen-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d58757e522a44051e7fa1eb1631937fb2d7b0810
      https://github.com/llvm/llvm-project/commit/d58757e522a44051e7fa1eb1631937fb2d7b0810
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2022-01-27 (Thu, 27 Jan 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sve-pfalse-machine-cse.mir

  Log Message:
  -----------
  [AArch64][SVE] Implement PFALSE with explicit AArch64ISD node.

The ISel patterns for PFALSE helps recognise the instructions as being
free of side-effects, which helps MachineCSE remove redundant
PFALSE instructions.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D118054