[all-commits] [llvm/llvm-project] 615d71: [RISCV][CodeGen] Implement IR Intrinsic support fo...

VincentWu via All-commits all-commits at lists.llvm.org
Wed Jan 26 23:53:56 PST 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 615d71d9a3400fe66fa066c7ef63a0a467171810
      https://github.com/llvm/llvm-project/commit/615d71d9a3400fe66fa066c7ef63a0a467171810
  Author: Wu Xinlong <821408745 at qq.com>
  Date:   2022-01-27 (Thu, 27 Jan 2022)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZk.td
    A llvm/test/CodeGen/RISCV/rv32zbb-zbp-zbkb.ll
    R llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll
    M llvm/test/CodeGen/RISCV/rv32zbc-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv32zbc-zbkc-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv32zbkb-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv32zbkx-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv32zbp-zbkb.ll
    M llvm/test/CodeGen/RISCV/rv32zbp.ll
    A llvm/test/CodeGen/RISCV/rv32zknd-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv32zkne-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv32zknh-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv32zksed-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv32zksh-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64zbb-zbp-zbkb.ll
    R llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll
    M llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64zbc-zbkc-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64zbkb-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64zbkx-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64zbp-zbkb.ll
    M llvm/test/CodeGen/RISCV/rv64zbp.ll
    A llvm/test/CodeGen/RISCV/rv64zknd-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64zknd-zkne-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64zkne-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64zknh-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64zksed-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64zksh-intrinsic.ll

  Log Message:
  -----------
  [RISCV][CodeGen] Implement IR Intrinsic support for K extension

This revision implements IR Intrinsic support for RISCV Scalar Crypto extension according to the specification of version [[ https://github.com/riscv/riscv-crypto/releases/tag/v1.0.0-scalar | 1.0]]
Co-author:@ksyx & @VincentWu & @lihongliang & @achieveartificialintelligence

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D102310




More information about the All-commits mailing list