[all-commits] [llvm/llvm-project] 927337: [RISCV] Add the passthru operand for RVV nomask lo...

[Zakk Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9273378b8576a63a04b03f1557442d3a90463488
      https://github.com/llvm/llvm-project/commit/9273378b8576a63a04b03f1557442d3a90463488
  Author: Zakk Chen <zakk.chen at sifive.com>
  Date:   2022-01-25 (Tue, 25 Jan 2022)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxei.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vluxei.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vleff.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vloxei.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vlse.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vluxei.c
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
    M llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll
    M llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll
    A llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
    M llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir

  Log Message:
  -----------
  [RISCV] Add the passthru operand for RVV nomask load intrinsics.

The goal is support tail and mask policy in RVV builtins.
We focus on IR part first.
If the passthru operand is undef, we use tail agnostic, otherwise
use tail undisturbed.

Co-Authored-by: Hsiangkai Wang <Hsiangkai at gmail.com>

Reviewers: craig.topper, frasercrmck

Differential Revision: https://reviews.llvm.org/D117647