[all-commits] [llvm/llvm-project] b089e4: [RISCV] Don't allow i64 vector div by constant to ...

[Yueh-Ting (eop) Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b089e4072a012dc0c8233cada37326f686ca2604
      https://github.com/llvm/llvm-project/commit/b089e4072a012dc0c8233cada37326f686ca2604
  Author: eopXD <eop.chen at sifive.com>
  Date:   2022-01-25 (Tue, 25 Jan 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll

  Log Message:
  -----------
  [RISCV] Don't allow i64 vector div by constant to use mulh with Zve64x

EEW=64 of mulh and its vairants requires V extension.

Authored by: Craig Topper <craig.topper at sifive.com> @craig.topper

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117947