[all-commits] [llvm/llvm-project] cd2a9f: [RISCV] Select int_riscv_vsll with shift of 1 to v...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cd2a9ff39788578f419d41f32d046150462696e2
      https://github.com/llvm/llvm-project/commit/cd2a9ff39788578f419d41f32d046150462696e2
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-24 (Mon, 24 Jan 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll

  Log Message:
  -----------
  [RISCV] Select int_riscv_vsll with shift of 1 to vadd.vv.

Add might be faster than shift. We can't do this earlier without
using a Freeze instruction.

This is the intrinsic version of D106689.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D118013