[all-commits] [llvm/llvm-project] 93deac: [AArch64] Optimize add/sub with immediate through ...
Micah Weston via All-commits
all-commits at lists.llvm.org
Sat Jan 22 04:39:36 PST 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 93deac2e2ba96248c05441a0bfa8385a73d78acb
https://github.com/llvm/llvm-project/commit/93deac2e2ba96248c05441a0bfa8385a73d78acb
Author: Micah Weston <micahsweston at gmail.com>
Date: 2022-01-22 (Sat, 22 Jan 2022)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
A llvm/test/CodeGen/AArch64/addsub-24bit-imm.mir
M llvm/test/CodeGen/AArch64/addsub.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
Log Message:
-----------
[AArch64] Optimize add/sub with immediate through MIPeepholeOpt
Fixes the build issue with D111034, whose goal was to optimize
add/sub with long immediates.
Optimize ([add|sub] r, imm) -> ([ADD|SUB] ([ADD|SUB] r, #imm0, lsl #12), #imm1),
if imm == (imm0<<12)+imm1. and both imm0 and imm1 are non-zero 12-bit unsigned
integers.
Optimize ([add|sub] r, imm) -> ([SUB|ADD] ([SUB|ADD] r, #imm0, lsl #12), #imm1),
if imm == -(imm0<<12)-imm1, and both imm0 and imm1 are non-zero 12-bit unsigned
integers.
The change which fixed the build issue in D111034 was the use of new virtual
registers so that SSA form is maintained until deleting MI.
Differential Revision: https://reviews.llvm.org/D117429
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