[all-commits] [llvm/llvm-project] b351ac: [AMDGPU][NFC] Regenerate InstCombine test

[Sebastian Neubauer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b351ac3873db15b16c2aa6d1e0e08ff9fab44f1f
      https://github.com/llvm/llvm-project/commit/b351ac3873db15b16c2aa6d1e0e08ff9fab44f1f
  Author: Sebastian Neubauer <Sebastian.Neubauer at amd.com>
  Date:   2022-01-21 (Fri, 21 Jan 2022)

  Changed paths:
    M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

  Log Message:
  -----------
  [AMDGPU][NFC] Regenerate InstCombine test


  Commit: 0530fdbbbb84ea3024a4a8f7156ff716f00ffd48
      https://github.com/llvm/llvm-project/commit/0530fdbbbb84ea3024a4a8f7156ff716f00ffd48
  Author: Sebastian Neubauer <Sebastian.Neubauer at amd.com>
  Date:   2022-01-21 (Fri, 21 Jan 2022)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/MIMGInstructions.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

  Log Message:
  -----------
  [AMDGPU] Fix LOD bias in A16 combine

As the codegen fix in D111754, the LOD bias needs to be converted to 16
bits. Fix this in the combine.

Differential Revision: https://reviews.llvm.org/D116038


  Commit: 603d18033c510c99ad84f26b6603db1ca68a500f
      https://github.com/llvm/llvm-project/commit/603d18033c510c99ad84f26b6603db1ca68a500f
  Author: Sebastian Neubauer <Sebastian.Neubauer at amd.com>
  Date:   2022-01-21 (Fri, 21 Jan 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/lib/Target/AMDGPU/MIMGInstructions.td
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

  Log Message:
  -----------
  [AMDGPU][InstCombine] Remove zero LOD bias

If the bias is zero, we can remove it from the image instruction.
Also copy other image optimizations (l->lz, mip->nomip) to IR combines.

Differential Revision: https://reviews.llvm.org/D116042


  Commit: ae2f9c8be89768086b9f335d60bbe8312b212f95
      https://github.com/llvm/llvm-project/commit/ae2f9c8be89768086b9f335d60bbe8312b212f95
  Author: Sebastian Neubauer <Sebastian.Neubauer at amd.com>
  Date:   2022-01-21 (Fri, 21 Jan 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    R llvm/test/CodeGen/AMDGPU/GlobalISel/image_ls_mipmap_zero.a16.ll
    R llvm/test/CodeGen/AMDGPU/GlobalISel/image_ls_mipmap_zero.ll
    R llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.ltolz.a16.ll
    R llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.ltolz.ll
    M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
    R llvm/test/CodeGen/AMDGPU/image_ls_mipmap_zero.ll
    R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ltolz.ll
    M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll

  Log Message:
  -----------
  [AMDGPU] Remove lz and nomip combine from codegen

These combines have been moved into the IR combiner in D116042.

Differential Revision: https://reviews.llvm.org/D116116


Compare: https://github.com/llvm/llvm-project/compare/329feeb938ac...ae2f9c8be897