[all-commits] [llvm/llvm-project] e78162: [LoopVectorize][AArch64] Use get.active.lane.mask ...

[david-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e781620dee4415018bdf3769a97c2ec31a85ff68
      https://github.com/llvm/llvm-project/commit/e781620dee4415018bdf3769a97c2ec31a85ff68
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2022-01-18 (Tue, 18 Jan 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
    M llvm/lib/Transforms/Vectorize/VPlan.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll

  Log Message:
  -----------
  [LoopVectorize][AArch64] Use get.active.lane.mask intrinsic when SVE is enabled

When SVE is enabled for AArch64 targets it makes more sense to use the
get.active.lane.mask intrinsic, because SVE has an exact 1-1 mapping
from the intrinsic to the 'whilelo' instruction for legal vector types.
This instruction neatly takes overflow into account as well. This patch
fixes an issue in VPInstruction::generateInstruction that assumed we are
only dealing with fixed-width vectors.

Differential Revision: https://reviews.llvm.org/D117109