[all-commits] [llvm/llvm-project] fc7af1: [AMDGPU] Pre-commit test for D116469. NFC

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fc7af123ddba48e53ae49af4352cb71f2a27cf89
      https://github.com/llvm/llvm-project/commit/fc7af123ddba48e53ae49af4352cb71f2a27cf89
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-14 (Fri, 14 Jan 2022)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll

  Log Message:
  -----------
  [AMDGPU] Pre-commit test for D116469. NFC

The multiply in this test is miscompiled to 0.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D117280


  Commit: 454256ef4f89e9d6a23a4b0f5bce52e0acafa755
      https://github.com/llvm/llvm-project/commit/454256ef4f89e9d6a23a4b0f5bce52e0acafa755
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-14 (Fri, 14 Jan 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll

  Log Message:
  -----------
  [AMDGPU] Correct the known bits calculation for MUL_I24.

I'm not entirely sure, but based on how ComputeNumSignBits handles
ISD::MUL, I believe this code was miscounting the number of sign
bits.

As an example of an incorrect result let's say that countMinSignBits
returned 1 for the left hand side and 24 for the right hand side.
LHSValBits would be 23 and RHSValBits would be 0 and the sum would
be 23. This would cause the code to set 9 high bits as zero/one. Now
suppose the real values for the left side is 0x800000 and the right
hand side is 0xffffff. The product is 0x00800000 which has 8 sign bits
not 9.

The number of valid bits for the left and right operands is now
the number of non-sign bits + 1. If the sum of the valid bits of
the left and right sides exceeds 32, then the result may overflow and we
can't say anything about the sign of the result. If the sum is 32
or less then it won't overflow and we know the result has at least
1 sign bit.

For the previous example, the code will now calculate the left
side valid bits as 24 and the right side as 1. The sum will be 25
and the sign bits will be 32 - 25 + 1 which is 8, the correct value.

Differential Revision: https://reviews.llvm.org/D116469


Compare: https://github.com/llvm/llvm-project/compare/0b2c21999571...454256ef4f89