[all-commits] [llvm/llvm-project] 9f38a6: GlobalIsel: Precommit fma combine tests with one o...

[petar-avramovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9f38a681cf25df5263105a8a4022d34caf3be051
      https://github.com/llvm/llvm-project/commit/9f38a681cf25df5263105a8a4022d34caf3be051
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2022-01-12 (Wed, 12 Jan 2022)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-post-legalize.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-unmerge-values.mir

  Log Message:
  -----------
  GlobalIsel: Precommit fma combine tests with one operand from unmerge


  Commit: c8c5dc766b259a64daf8e43045bed4e01455078c
      https://github.com/llvm/llvm-project/commit/c8c5dc766b259a64daf8e43045bed4e01455078c
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2022-01-12 (Wed, 12 Jan 2022)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-post-legalize.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-unmerge-values.mir

  Log Message:
  -----------
  GlobalIsel: Fix fma combine when one of the operands comes from unmerge

Fma combine assumes that MRI.getVRegDef(Reg)->getOperand(0).getReg() = Reg
which is not true when Reg is defined by instruction with multiple defs
e.g. G_UNMERGE_VALUES.
Fix is to keep register and the instruction that defines register in
DefinitionAndSourceRegister and use when needed.

Differential Revision: https://reviews.llvm.org/D117032


Compare: https://github.com/llvm/llvm-project/compare/d5be48c66d3e...c8c5dc766b25