[all-commits] [llvm/llvm-project] 8470bf: [AMDGPU] Do not reserve any VGPR for SGPR spills

[Austin Kerbow via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8470bf2b08845eea552a0539017e500ab21fd599
      https://github.com/llvm/llvm-project/commit/8470bf2b08845eea552a0539017e500ab21fd599
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2022-01-11 (Tue, 11 Jan 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
    R llvm/test/CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll
    A llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll

  Log Message:
  -----------
  [AMDGPU] Do not reserve any VGPR for SGPR spills

After the split register allocation changes in eebe841a47cb it is no
longer necessary to reserve a VGPR before RA. This can also create bugs
when IPRA is enabled since we cannot predict that a called function may
not reserve any register if it does not have any SGPR spills. If that
happens those functions may override reserved registers that are
normally callee saved. Added a test to show this.

Fixes: SWDEV-309900

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D115551