[all-commits] [llvm/llvm-project] 9c4b49: [ShrinkWrap] check for PPC's non-callee-saved LR

[Nick Desaulniers via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9c4b49db1928be41f9b531d3e050d1e4c22a77aa
      https://github.com/llvm/llvm-project/commit/9c4b49db1928be41f9b531d3e050d1e4c22a77aa
  Author: Nick Desaulniers <ndesaulniers at google.com>
  Date:   2022-01-11 (Tue, 11 Jan 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
    M llvm/lib/CodeGen/ShrinkWrap.cpp
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
    M llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll

  Log Message:
  -----------
  [ShrinkWrap] check for PPC's non-callee-saved LR

As pointed out in https://reviews.llvm.org/D115688#inline-1108193, we
don't want to sink the save point past an INLINEASM_BR, otherwise
prologepilog may incorrectly sink a prolog past the MBB containing an
INLINEASM_BR and into the wrong MBB.

ShrinkWrap is getting this wrong because LR is not in the list of callee
saved registers. Specifically, ShrinkWrap::useOrDefCSROrFI calls
RegisterClassInfo::getLastCalleeSavedAlias which reads
CalleeSavedAliases which was populated by
RegisterClassInfo::runOnMachineFunction by iterating the list of
MCPhysReg returned from MachineRegisterInfo::getCalleeSavedRegs.

Because PPC's LR is non-allocatable, it's NOT considered callee saved.
Add an interface to TargetRegisterInfo for such a case and use it in
Shrinkwrap to ensure we don't sink a prolog past an INLINEASM or
INLINEASM_BR that clobbers LR.

Reviewed By: jyknight, efriedma, nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D116424