[all-commits] [llvm/llvm-project] b645bc: [RISCV] Generalize (srl (and X, 0xffff), C) -> (sr...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b645bcd98a11c7857cdee51202c64d15b9a4f90d
      https://github.com/llvm/llvm-project/commit/b645bcd98a11c7857cdee51202c64d15b9a4f90d
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-09 (Sun, 09 Jan 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/test/CodeGen/RISCV/alu8.ll
    M llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
    M llvm/test/CodeGen/RISCV/div-by-constant.ll
    M llvm/test/CodeGen/RISCV/div.ll
    M llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll
    M llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll
    M llvm/test/CodeGen/RISCV/rv64zbb.ll
    M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll

  Log Message:
  -----------
  [RISCV] Generalize (srl (and X, 0xffff), C) -> (srli (slli X, (XLen-16), (XLen-16) + C) optimization.

This can be generalized to (srl (and X, C2), C) ->
(srli (slli X, (XLen-C3), (XLen-C3) + C). Where C2 is a mask with
C3 trailing ones.

This can avoid constant materialization for C2. This is beneficial
even when C2 can be selected to ANDI because the SLLI can become
C.SLLI, but C.ANDI cannot cover all the immediates of ANDI.

This also enables CSE in some cases of i8 sdiv by constant codegen.