[all-commits] [llvm/llvm-project] 296e8c: [RISCV] Isel (sra (sext_inreg X, i16), C) -> (srai...
Craig Topper via All-commits
all-commits at lists.llvm.org
Sun Jan 9 21:24:18 PST 2022
Author: Craig Topper <craig.topper at sifive.com>
Date: 2022-01-09 (Sun, 09 Jan 2022)
[RISCV] Isel (sra (sext_inreg X, i16), C) -> (srai (slli X, (XLen-16), (XLen-16) + C).
Similar for (sra (sext_inreg X, i8), C).
With Zbb, sext_inreg of i8 and i16 are legal for sext.b and sext.h.
This transform makes the Zbb codegen the same as without Zbb. The
shifts are more compressible. This also exposes an opportunity for
CSE with another slli in the i16 sdiv by constant codegen.
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