[all-commits] [llvm/llvm-project] 042394: [RISCV] Add a command line option to control the L...

Craig Topper via All-commits all-commits at lists.llvm.org
Fri Jan 7 20:02:23 PST 2022

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 042394b69e99c8e9e502209af1c5ff529ac30586
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-07 (Fri, 07 Jan 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-unroll.ll

  Log Message:
  [RISCV] Add a command line option to control the LMUL used by TTI's getRegisterBitWidth.

By default we return the width of an LMUL=1 register. We can enable
testing with larger LMUL values by returning a larger bit width.

This patch adds a RISCV specific option to provide a LMUL which will be
multiplied by the LMUL=1 bit width.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D116339

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