[all-commits] [llvm/llvm-project] 91cf2a: [RISCV][NFC] Use sub operator to generate register...

[Wang Pengcheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 91cf2a9b6c3ca3a205988b6f752944d76fc2fac4
      https://github.com/llvm/llvm-project/commit/91cf2a9b6c3ca3a205988b6f752944d76fc2fac4
  Author: wangpc <pc.wang at linux.alibaba.com>
  Date:   2022-01-07 (Fri, 07 Jan 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td

  Log Message:
  -----------
  [RISCV][NFC] Use sub operator to generate register list

There are several duplicated lines for generating GPRXXX's
register list that can be eliminated by using `sub` operator.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D116729