[all-commits] [llvm/llvm-project] fd992a: [RISCV] Use macros to reduce repetive switch cases...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fd992aac195a3596c30108a9263b0d1244fafe46
      https://github.com/llvm/llvm-project/commit/fd992aac195a3596c30108a9263b0d1244fafe46
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-05 (Wed, 05 Jan 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

  Log Message:
  -----------
  [RISCV] Use macros to reduce repetive switch cases. NFC

These 3 switches map LMUL enum to instruction names. These follow
a regular pattern. Use a macro to reduce the number of source code
lines.

Reviewed By: arcbbb

Differential Revision: https://reviews.llvm.org/D116631


  Commit: 88ecdd30f607f884d4f650cbcd755c1d27c9f3fa
      https://github.com/llvm/llvm-project/commit/88ecdd30f607f884d4f650cbcd755c1d27c9f3fa
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-01-05 (Wed, 05 Jan 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

  Log Message:
  -----------
  [LegalizeTypes] Remove IsVP argument from type legalization methods. NFC

We can either check the opcode or number of operands or use
ISD::isVPOpcode inside the methods.

In some places I've used number of operands figuring that it is
cheaper than isVPOpcode. I've included isVPOpcode in an assert to
verify.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D116578


Compare: https://github.com/llvm/llvm-project/compare/782791ee84d2...88ecdd30f607