[all-commits] [llvm/llvm-project] fd4808: [llvm] Remove redundant member initialization (NFC)

[kazutakahirata via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fd4808887ee47f3ec8a030e9211169ef4fb094c3
      https://github.com/llvm/llvm-project/commit/fd4808887ee47f3ec8a030e9211169ef4fb094c3
  Author: Kazu Hirata <kazu at google.com>
  Date:   2022-01-01 (Sat, 01 Jan 2022)

  Changed paths:
    M llvm/include/llvm/ADT/Triple.h
    M llvm/include/llvm/Analysis/BasicAliasAnalysis.h
    M llvm/include/llvm/Analysis/DDG.h
    M llvm/include/llvm/Analysis/LazyCallGraph.h
    M llvm/include/llvm/Analysis/MemoryLocation.h
    M llvm/include/llvm/Analysis/ObjCARCAliasAnalysis.h
    M llvm/include/llvm/Analysis/ScalarEvolutionAliasAnalysis.h
    M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
    M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
    M llvm/include/llvm/CodeGen/MachinePassManager.h
    M llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
    M llvm/include/llvm/DWARFLinker/DWARFLinker.h
    M llvm/include/llvm/DebugInfo/GSYM/StringTable.h
    M llvm/include/llvm/DebugInfo/Symbolize/DIPrinter.h
    M llvm/include/llvm/FileCheck/FileCheck.h
    M llvm/include/llvm/IR/LegacyPassManagers.h
    M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
    M llvm/include/llvm/MCA/HardwareUnits/LSUnit.h
    M llvm/include/llvm/MCA/HardwareUnits/ResourceManager.h
    M llvm/include/llvm/MCA/Stages/EntryStage.h
    M llvm/include/llvm/MCA/Stages/ExecuteStage.h
    M llvm/include/llvm/MCA/Stages/InOrderIssueStage.h
    M llvm/include/llvm/MCA/Stages/InstructionTables.h
    M llvm/include/llvm/MCA/Stages/RetireStage.h
    M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
    M llvm/include/llvm/Remarks/RemarkSerializer.h
    M llvm/include/llvm/Support/ScopedPrinter.h
    M llvm/include/llvm/Transforms/IPO/Attributor.h
    M llvm/include/llvm/Transforms/Scalar/LoopPassManager.h
    M llvm/lib/Analysis/CFLSteensAliasAnalysis.cpp
    M llvm/lib/Analysis/CallGraphSCCPass.cpp
    M llvm/lib/Analysis/DDG.cpp
    M llvm/lib/Analysis/GlobalsModRef.cpp
    M llvm/lib/Analysis/IVUsers.cpp
    M llvm/lib/Analysis/LoopCacheAnalysis.cpp
    M llvm/lib/Analysis/LoopPass.cpp
    M llvm/lib/Analysis/RegionPass.cpp
    M llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
    M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
    M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
    M llvm/lib/CodeGen/MachineOptimizationRemarkEmitter.cpp
    M llvm/lib/CodeGen/ScoreboardHazardRecognizer.cpp
    M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
    M llvm/lib/DebugInfo/PDB/Native/NativeEnumTypes.cpp
    M llvm/lib/ExecutionEngine/GDBRegistrationListener.cpp
    M llvm/lib/IR/LegacyPassManager.cpp
    M llvm/lib/IR/Module.cpp
    M llvm/lib/InterfaceStub/IFSStub.cpp
    M llvm/lib/MC/MCParser/AsmParser.cpp
    M llvm/lib/MC/MCParser/MasmParser.cpp
    M llvm/lib/MCA/Stages/DispatchStage.cpp
    M llvm/lib/MCA/Stages/InOrderIssueStage.cpp
    M llvm/lib/Remarks/BitstreamRemarkSerializer.cpp
    M llvm/lib/Remarks/RemarkStreamer.cpp
    M llvm/lib/Remarks/RemarkStringTable.cpp
    M llvm/lib/Remarks/YAMLRemarkParser.cpp
    M llvm/lib/Support/YAMLParser.cpp
    M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
    M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULibFunc.h
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
    M llvm/lib/Target/ARM/ARMHazardRecognizer.cpp
    M llvm/lib/Target/ARM/ARMHazardRecognizer.h
    M llvm/lib/Target/ARM/ARMInstrInfo.cpp
    M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
    M llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp
    M llvm/lib/Target/ARM/ARMRegisterInfo.cpp
    M llvm/lib/Target/ARM/ARMTargetObjectFile.h
    M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
    M llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
    M llvm/lib/Target/AVR/AVRSubtarget.cpp
    M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
    M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
    M llvm/lib/Target/BPF/BPFSubtarget.cpp
    M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
    M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
    M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
    M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
    M llvm/lib/Target/Lanai/LanaiSubtarget.cpp
    M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
    M llvm/lib/Target/MSP430/MSP430Subtarget.cpp
    M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
    M llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
    M llvm/lib/Target/Mips/MipsInstructionSelector.cpp
    M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
    M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetObjectFile.h
    M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
    M llvm/lib/Target/PowerPC/GISel/PPCInstructionSelector.cpp
    M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/RISCVInstructionSelector.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterBankInfo.cpp
    M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
    M llvm/lib/Target/Sparc/SparcTargetObjectFile.h
    M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
    M llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
    M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
    M llvm/lib/Target/VE/VEMachineFunctionInfo.h
    M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
    M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
    M llvm/lib/Target/X86/X86InstructionSelector.cpp
    M llvm/lib/Target/X86/X86RegisterBankInfo.cpp
    M llvm/lib/Target/XCore/XCoreSubtarget.cpp
    M llvm/lib/Transforms/IPO/Inliner.cpp
    M llvm/lib/Transforms/IPO/PartialInlining.cpp
    M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
    M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/tools/dsymutil/BinaryHolder.h
    M llvm/tools/dsymutil/Reproducer.cpp
    M llvm/tools/llvm-cov/CoverageSummaryInfo.h
    M llvm/tools/llvm-mca/CodeRegion.h
    M llvm/tools/llvm-mca/PipelinePrinter.h
    M llvm/tools/llvm-objcopy/ELF/Object.h
    M llvm/tools/llvm-objdump/SourcePrinter.h
    M llvm/tools/llvm-profdata/llvm-profdata.cpp
    M llvm/tools/llvm-readobj/llvm-readobj.cpp
    M llvm/utils/TableGen/GlobalISel/GIMatchDag.h
    M llvm/utils/TableGen/GlobalISel/GIMatchTree.cpp
    M llvm/utils/TableGen/GlobalISelEmitter.cpp
    M llvm/utils/TableGen/PredicateExpander.h
    M llvm/utils/TableGen/RegisterBankEmitter.cpp

  Log Message:
  -----------
  [llvm] Remove redundant member initialization (NFC)

Identified with readability-redundant-member-init.