[all-commits] [llvm/llvm-project] 892c73: [Support] improve known bits analysis for leading ...
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Mon Dec 20 06:12:35 PST 2021
Author: Sanjay Patel <spatel at rotateright.com>
Date: 2021-12-20 (Mon, 20 Dec 2021)
[Support] improve known bits analysis for leading zeros of multiply
Instead of summing leading zeros on the input operands, multiply the
max possible values of those inputs and count the leading zeros of
the result. This can give us an extra zero bit (typically in cases
where one of the operands is a known constant).
This allows folding away the remaining 'add' ops in the motivating
bug (modeled in the PhaseOrdering IR test):
Differential Revision: https://reviews.llvm.org/D115969
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