[all-commits] [llvm/llvm-project] 402aaf: [RISCV] Add non-standard Xin feature for N3 core

[junparser via All-commits]

  Branch: refs/heads/rv-n3
  Home:   https://github.com/llvm/llvm-project
  Commit: 402aaf7d3f6d48e023b0aa6005c439a18cd4d029
      https://github.com/llvm/llvm-project/commit/402aaf7d3f6d48e023b0aa6005c439a18cd4d029
  Author: Jun Ma <JunMa at linux.alibaba.com>
  Date:   2021-12-17 (Fri, 17 Dec 2021)

  Changed paths:
    M clang/test/Driver/riscv-arch.c
    M clang/test/Preprocessor/riscv-target-features.c
    M llvm/lib/Support/RISCVISAInfo.cpp
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/test/CodeGen/RISCV/select-bare.ll
    M llvm/test/MC/RISCV/attribute-arch.s

  Log Message:
  -----------
  [RISCV] Add non-standard Xin feature for N3 core


  Commit: eb64afdb5c50932d271952538a4778849029a68d
      https://github.com/llvm/llvm-project/commit/eb64afdb5c50932d271952538a4778849029a68d
  Author: Jun Ma <JunMa at linux.alibaba.com>
  Date:   2021-12-17 (Fri, 17 Dec 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/RISCVInstrFormats.td
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    A llvm/lib/Target/RISCV/RISCVInstrInfoXin.td

  Log Message:
  -----------
  [RISCV] Add N3 Load/Store under Xin


  Commit: dd399a6194e8506d2af87794d78cb920c66f19b0
      https://github.com/llvm/llvm-project/commit/dd399a6194e8506d2af87794d78cb920c66f19b0
  Author: Jun Ma <JunMa at linux.alibaba.com>
  Date:   2021-12-17 (Fri, 17 Dec 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    A llvm/test/CodeGen/RISCV/callee-saved-n3.ll
    A llvm/test/CodeGen/RISCV/large-stack-n3.ll

  Log Message:
  -----------
  [RISCV] Use ldp/sdp for EPI


Compare: https://github.com/llvm/llvm-project/compare/402aaf7d3f6d%5E...dd399a6194e8