[all-commits] [llvm/llvm-project] 67cce1: [X86] Adjust some IceLake fp shuffle schedule clas...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 67cce1ceee2d15a570535aabed0aef2bd1314be3
      https://github.com/llvm/llvm-project/commit/67cce1ceee2d15a570535aabed0aef2bd1314be3
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-12-19 (Sun, 19 Dec 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86SchedIceLake.td
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vl.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse2.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse3.s

  Log Message:
  -----------
  [X86] Adjust some IceLake fp shuffle schedule classes (PR48110)

The IceLake scheduler model is still mainly a copy of the SkylakeServer model.

This patch adjusts the fp shuffle classes to account for most instructions now working on Port 1 as well as Port 5.

This is based off Agner + uops.info as well as the PR48110 report.

Differential Revision: https://reviews.llvm.org/D115752