[all-commits] [llvm/llvm-project] 591371: AMDGPU: Regenerate some mir test checks with -NEXT

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 591371f7df3cee0429c85f2aeb4a848df8888386
      https://github.com/llvm/llvm-project/commit/591371f7df3cee0429c85f2aeb4a848df8888386
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-12-18 (Sat, 18 Dec 2021)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-anyext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-build-vector.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-concat-vectors.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-sext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-trunc.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg-with-success.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-add.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-and.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-fadd-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-fadd-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-max.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-min.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-or.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-sub.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-umax.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-umin.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xor.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values-build-vector.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-constant-32bit.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-constant-32bit.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-sextload-from-sextinreg.mir

  Log Message:
  -----------
  AMDGPU: Regenerate some mir test checks with -NEXT