[all-commits] [llvm/llvm-project] 2b4876: AMDGPU: Remove AMDGPUFixFunctionBitcasts pass

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2b4876157562bc76e86f193d371348993905bc61
      https://github.com/llvm/llvm-project/commit/2b4876157562bc76e86f193d371348993905bc61
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-12-15 (Wed, 15 Dec 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    R llvm/lib/Target/AMDGPU/AMDGPUFixFunctionBitcasts.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
    M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll

  Log Message:
  -----------
  AMDGPU: Remove AMDGPUFixFunctionBitcasts pass

This was a workaround for not supporting indirect calls when
instcombine didn't eliminate constant expression casts of the callee
at -O0. Indirect calls are supposed to work now, so drop the hack.


  Commit: 20a6cbd22036d337d7271298c459c9c35be5314e
      https://github.com/llvm/llvm-project/commit/20a6cbd22036d337d7271298c459c9c35be5314e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-12-15 (Wed, 15 Dec 2021)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir

  Log Message:
  -----------
  AMDGPU: Regenerate checks


  Commit: 45f16eabd67b1d3f8fab3ed24c74b9b9dac2239e
      https://github.com/llvm/llvm-project/commit/45f16eabd67b1d3f8fab3ed24c74b9b9dac2239e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-12-15 (Wed, 15 Dec 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

  Log Message:
  -----------
  AMDGPU: Combine is.shared/is.private of null/undef


  Commit: f0cc43cc91f7f9e45aefb3fab4cae50489e7696f
      https://github.com/llvm/llvm-project/commit/f0cc43cc91f7f9e45aefb3fab4cae50489e7696f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-12-15 (Wed, 15 Dec 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
    A llvm/test/CodeGen/AMDGPU/agpr-copy-no-vgprs.mir
    A llvm/test/CodeGen/AMDGPU/agpr-copy-sgpr-no-vgprs.mir

  Log Message:
  -----------
  AMDGPU: Use v_accvgpr_mov_b32 when copying AGPR tuples on gfx90a

This is an optimization, but also fixes a compile failure when no free
VGPRs are available. The problem still exists for gfx908 where a
scratch register is still required. This also still exists for the
SGPR to AGPR case.


Compare: https://github.com/llvm/llvm-project/compare/2bdad16303f4...f0cc43cc91f7