[all-commits] [llvm/llvm-project] a4830d: [mlir][RFC] Add scalable dimensions to VectorType
jsetoain via All-commits
all-commits at lists.llvm.org
Wed Dec 15 01:37:41 PST 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: a4830d14edbb2a21eb35f3d79d1f64bd09db8b1c
https://github.com/llvm/llvm-project/commit/a4830d14edbb2a21eb35f3d79d1f64bd09db8b1c
Author: Javier Setoain <javier.setoain at gmail.com>
Date: 2021-12-15 (Wed, 15 Dec 2021)
Changed paths:
M mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td
M mlir/include/mlir/Dialect/ArmSVE/ArmSVEDialect.h
R mlir/include/mlir/Dialect/ArmSVE/ArmSVEOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
M mlir/include/mlir/Dialect/Vector/VectorOps.td
M mlir/include/mlir/IR/BuiltinTypes.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/OpBase.td
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/Arithmetic/IR/ArithmeticOps.cpp
M mlir/lib/Dialect/ArmSVE/IR/ArmSVEDialect.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Dialect/StandardOps/IR/Ops.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/BuiltinAttributes.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/lib/Parser/Parser.h
M mlir/lib/Parser/TypeParser.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/LLVMIR/TypeToLLVM.cpp
M mlir/test/Dialect/Arithmetic/ops.mlir
M mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
R mlir/test/Dialect/ArmSVE/memcpy.mlir
M mlir/test/Dialect/ArmSVE/roundtrip.mlir
M mlir/test/Dialect/Builtin/invalid.mlir
M mlir/test/Dialect/Builtin/ops.mlir
M mlir/test/Dialect/Vector/ops.mlir
A mlir/test/Dialect/Vector/vector-scalable-memcpy.mlir
M mlir/test/Target/LLVMIR/arm-sve.mlir
Log Message:
-----------
[mlir][RFC] Add scalable dimensions to VectorType
With VectorType supporting scalable dimensions, we don't need many of
the operations currently present in ArmSVE, like mask generation and
basic arithmetic instructions. Therefore, this patch also gets
rid of those.
Having built-in scalable vector support also simplifies the lowering of
scalable vector dialects down to LLVMIR.
Scalable dimensions are indicated with the scalable dimensions
between square brackets:
vector<[4]xf32>
Is a scalable vector of 4 single precission floating point elements.
More generally, a VectorType can have a set of fixed-length dimensions
followed by a set of scalable dimensions:
vector<2x[4x4]xf32>
Is a vector with 2 scalable 4x4 vectors of single precission floating
point elements.
The scale of the scalable dimensions can be obtained with the Vector
operation:
%vs = vector.vscale
This change is being discussed in the discourse RFC:
https://llvm.discourse.group/t/rfc-add-built-in-support-for-scalable-vector-types/4484
Differential Revision: https://reviews.llvm.org/D111819
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