[all-commits] [llvm/llvm-project] 1a60ae: [InstCombine] fold mask-with-signbit-splat to icmp...

RotateRight via All-commits all-commits at lists.llvm.org
Tue Dec 14 13:02:10 PST 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1a60ae02c65d26981017f59bc5918d3c2e363bfd
      https://github.com/llvm/llvm-project/commit/1a60ae02c65d26981017f59bc5918d3c2e363bfd
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-12-14 (Tue, 14 Dec 2021)

  Changed paths:
    M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    M llvm/test/Transforms/InstCombine/and.ll
    M llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
    M llvm/test/Transforms/InstCombine/logical-select.ll
    M llvm/test/Transforms/InstCombine/vec_sext.ll
    M llvm/test/Transforms/PhaseOrdering/vector-select.ll

  Log Message:
  -----------
  [InstCombine] fold mask-with-signbit-splat to icmp+select

~(iN X s>> (N-1)) & Y --> (X s< 0) ? 0 : Y

https://alive2.llvm.org/ce/z/JKlQ9x

This is similar to D111410 / 727e642e970d028049d ,
but it includes a 'not' of the signbit and so it
saves an instruction in the basic pattern.

DAGCombiner or target-specific folds can expand
this back into bit-hacks.

The diffs in the logical-select tests are not true
regressions - running early-cse and another round
of instcombine is expected in a normal opt pipeline,
and that reduces back to a minimal form as shown
in the duplicated PhaseOrdering test.

I have no understanding of the SystemZ diffs, so
I made the minimal edits suggested by FileCheck to
make that test pass again. That whole test file is
wrong though. It is running the entire optimizer (-O2)
to check IR, and then topping that by even running
codegen and checking asm. It needs to be split up.

Fixes #52631




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