[all-commits] [llvm/llvm-project] 5861cf: [RISCV] Remove FCSR from RISCVRegisterInfo.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5861cf77da4f7d235d435dd8fb89b100d1698112
      https://github.com/llvm/llvm-project/commit/5861cf77da4f7d235d435dd8fb89b100d1698112
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-12-10 (Fri, 10 Dec 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td

  Log Message:
  -----------
  [RISCV] Remove FCSR from RISCVRegisterInfo.

We only used this to mark it as a reserved register. But that's not
important if we don't do anything else with it.

I think if we were ever to do anything with it, we would need to
model it as a super register of FRM and FFLAGS. But it might be
easier to reference both FRM and FFLAGS in implicit defs/uses
for anything we were to do with "fcsr".

Reviewed By: sepavloff

Differential Revision: https://reviews.llvm.org/D115455