[all-commits] [llvm/llvm-project] a556ec: [CSKY] Complete codegen of basic arithmetic and lo...

Zi Xuan Wu (Zeson) via All-commits all-commits at lists.llvm.org
Wed Dec 8 19:41:11 PST 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a556ec8861df920bfaee3057df8aac739aa59b24
      https://github.com/llvm/llvm-project/commit/a556ec8861df920bfaee3057df8aac739aa59b24
  Author: Zi Xuan Wu <zixuan.wu at linux.alibaba.com>
  Date:   2021-12-09 (Thu, 09 Dec 2021)

  Changed paths:
    M llvm/lib/Target/CSKY/CSKYISelDAGToDAG.cpp
    M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
    M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
    M llvm/lib/Target/CSKY/CSKYInstrInfo.h
    M llvm/lib/Target/CSKY/CSKYInstrInfo.td
    M llvm/lib/Target/CSKY/CSKYRegisterInfo.cpp
    M llvm/lib/Target/CSKY/CSKYRegisterInfo.h
    M llvm/test/CodeGen/CSKY/base-i.ll
    A llvm/test/CodeGen/CSKY/cvt-i.ll
    A llvm/test/CodeGen/CSKY/intrinsic.ll
    A llvm/test/CodeGen/CSKY/ldst-i.ll
    A llvm/test/CodeGen/CSKY/rotl.ll

  Log Message:
  -----------
  [CSKY] Complete codegen of basic arithmetic and load/store operations

Complete basic arithmetic operations such as add/sub/mul/div, and it also includes converions
and some specific operations such as bswap.Add load/store patterns to generate different addressing mode instructions.

Also enable some infra such as copy physical register and eliminate frame index.




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