[all-commits] [llvm/llvm-project] 4b48cd: [InstCombine] add tests for rem with select operan...

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4b48cdd4dd47ca008f2efd74f3f56214fc36497a
      https://github.com/llvm/llvm-project/commit/4b48cdd4dd47ca008f2efd74f3f56214fc36497a
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-12-07 (Tue, 07 Dec 2021)

  Changed paths:
    M llvm/test/Transforms/InstCombine/rem.ll

  Log Message:
  -----------
  [InstCombine] add tests for rem with select operand; NFC


  Commit: 8a69b0447898786ea352819df9c5164ed799af55
      https://github.com/llvm/llvm-project/commit/8a69b0447898786ea352819df9c5164ed799af55
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-12-07 (Tue, 07 Dec 2021)

  Changed paths:
    M llvm/lib/Analysis/InstructionSimplify.cpp
    M llvm/test/Transforms/InstSimplify/AndOrXor.ll
    M llvm/test/Transforms/InstSimplify/or.ll

  Log Message:
  -----------
  [InstSimplify] add logic fold for 'or' with 'xor'+'and'

This replaces the 'or' from 4b30076f16fc with an 'and'.
We have to guard against propagating undef elements from
vector 'not' values:
https://alive2.llvm.org/ce/z/irMwRc


Compare: https://github.com/llvm/llvm-project/compare/2a9b2444d9c2...8a69b0447898