[all-commits] [llvm/llvm-project] ab01f4: AMDGPU/GlobalISel: Do not fcanonicalize const spla...

[petar-avramovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ab01f4d26400f13f71a57b15f3f6c336c24606e8
      https://github.com/llvm/llvm-project/commit/ab01f4d26400f13f71a57b15f3f6c336c24606e8
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2021-12-03 (Fri, 03 Dec 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Do not fcanonicalize const splat padded with undef

Recognize constant splat padded with undef in isCanonicalized.
Fcanonicalize will be removed by RemoveFcanonicalize in post-legalizer
combiner. We will treat undef as value that will result in a splat
in clamp combine after regbankselect.

Differential Revision: https://reviews.llvm.org/D104408


  Commit: ec54867d750bd6c095697d089d9ad5a7440974a8
      https://github.com/llvm/llvm-project/commit/ec54867d750bd6c095697d089d9ad5a7440974a8
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2021-12-03 (Fri, 03 Dec 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
    M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
    M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    A llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-fmed3-minmax-const.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Add floating point med3 combine

Add floating point version of med3 combine.
Source is fminnum(fmaxnum(Val, K0), K1) or fmaxnum(fminnum(Val, K1), K0)
where K0 and K1 are constants and K0 <= K1.

Differential Revision: https://reviews.llvm.org/D90051


  Commit: 0b34ffe4a61eab708b594f23a7781c90ec22423d
      https://github.com/llvm/llvm-project/commit/0b34ffe4a61eab708b594f23a7781c90ec22423d
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2021-12-03 (Fri, 03 Dec 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
    M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
    M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    A llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-clamp-fmed3-const.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-clamp-minmax-const.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Add clamp combine

Add clamp combine. Source is fminnum(fmaxnum(Val, 0.0), 1.0) or
fmaxnum(fminnum(Val, 1.0), 0.0) or fmed3 intrinsic with 0.0 and
1.0 as two out of three operands.

Differential Revision: https://reviews.llvm.org/D90052


Compare: https://github.com/llvm/llvm-project/compare/9dd1f8dfdd1a...0b34ffe4a61e