[all-commits] [llvm/llvm-project] 1423e8: [mlir][Vector] Support 0-D vectors in `BitCastOp`

Michal Terepeta via All-commits all-commits at lists.llvm.org
Fri Dec 3 00:57:52 PST 2021

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1423e8bf5dda75877c0414dd26d024fd770d71fb
  Author: Michal Terepeta <michalt at google.com>
  Date:   2021-12-03 (Fri, 03 Dec 2021)

  Changed paths:
    M mlir/include/mlir/Dialect/Vector/VectorOps.td
    M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
    M mlir/lib/Dialect/Vector/VectorOps.cpp
    M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
    M mlir/test/Dialect/Vector/invalid.mlir
    M mlir/test/Dialect/Vector/ops.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/test-0-d-vectors.mlir

  Log Message:
  [mlir][Vector] Support 0-D vectors in `BitCastOp`

The implementation only allows to bit-cast between two 0-D vectors. We could
probably support casting from/to vectors like `vector<1xf32>`, but I wasn't
convinced that this would be important and it would require breaking the
invariant that `BitCastOp` works only on vectors with equal rank.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114854

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