[all-commits] [llvm/llvm-project] 641906: AMDGPU/GlobalISel: Fix constant bus restriction er...

petar-avramovic via All-commits all-commits at lists.llvm.org
Wed Dec 1 12:37:20 PST 2021

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 641906da8de2f131a433ec26d7fd44ee74abfa5b
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2021-12-01 (Wed, 01 Dec 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-smed3.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-umed3.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll

  Log Message:
  AMDGPU/GlobalISel: Fix constant bus restriction errors for med3

Detected on targets older then gfx10 (e.g. gfx9) for constants that are
too large to be inlined (constant are sgpr by default).
In med3 combine it is expected that regbankselect maps all operands of
min/max we try to match to vgpr. However constants are mapped to sgpr
and there will be a sgpr-to-vgpr copy. Matchers look through sgpr-to-vgpr
copies and return sgpr and these break constant bus restriction.
Build med3 with all vgpr operands. Use existing sgpr-to-vgpr copies for
matched sgprs. If there is no such copy (not expected) build one.

Differential Revision: https://reviews.llvm.org/D114700

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