[all-commits] [llvm/llvm-project] c537a9: [mlir][Vector] Thread 0-d vectors through vector.t...

[Nicolas Vasilache via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c537a943342be66d0876c6440a2df317b572c092
      https://github.com/llvm/llvm-project/commit/c537a943342be66d0876c6440a2df317b572c092
  Author: Nicolas Vasilache <nicolas.vasilache at gmail.com>
  Date:   2021-12-01 (Wed, 01 Dec 2021)

  Changed paths:
    M mlir/include/mlir/Dialect/Vector/VectorOps.td
    M mlir/include/mlir/Interfaces/VectorInterfaces.td
    M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
    M mlir/lib/Conversion/VectorToROCDL/VectorToROCDL.cpp
    M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
    M mlir/lib/Dialect/Linalg/ComprehensiveBufferize/VectorInterfaceImpl.cpp
    M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
    M mlir/lib/Dialect/MemRef/Transforms/FoldSubViewOps.cpp
    M mlir/lib/Dialect/Vector/VectorDropLeadUnitDim.cpp
    M mlir/lib/Dialect/Vector/VectorOps.cpp
    M mlir/lib/Dialect/Vector/VectorTransferPermutationMapRewritePatterns.cpp
    M mlir/lib/Dialect/Vector/VectorTransforms.cpp
    M mlir/lib/Interfaces/VectorInterfaces.cpp
    M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
    M mlir/test/Dialect/Linalg/vectorization.mlir
    M mlir/test/Dialect/Vector/invalid.mlir
    M mlir/test/Dialect/Vector/ops.mlir
    M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir

  Log Message:
  -----------
  [mlir][Vector] Thread 0-d vectors through vector.transfer ops

This revision adds 0-d vector support to vector.transfer ops.
In the process, numerous cleanups are applied, in particular around normalizing
and reducing the number of builders.

Reviewed By: ThomasRaoux, springerm

Differential Revision: https://reviews.llvm.org/D114803