[all-commits] [llvm/llvm-project] 9e3e1a: [InstCombine] Allow fake vector insert folding to ...
Daniel Sanders via All-commits
all-commits at lists.llvm.org
Tue Nov 30 13:55:19 PST 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 9e3e1aad3161f4ce5301c3a59c7313ad83240a6d
https://github.com/llvm/llvm-project/commit/9e3e1aad3161f4ce5301c3a59c7313ad83240a6d
Author: Srividya Karumuri <srividya_karumuri at apple.com>
Date: 2021-11-30 (Tue, 30 Nov 2021)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/bitcast-inselt-bitcast.ll
Log Message:
-----------
[InstCombine] Allow fake vector insert folding to bit-logic only if the insert element is integer type
The below commit is causing assertion when insert element type is not integer
type such as half. This is because the transformation is creating zext before
doing bitwise OR, and the zext is supported only for integer types
https://github.com/llvm/llvm-project/commit/80ab06c599a0f5a90951c36a57b2a9b492b19d61
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D114734
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