[all-commits] [llvm/llvm-project] 9e8a71: [DAG] Create fptosi.sat from clamped fptosi
David Green via All-commits
all-commits at lists.llvm.org
Tue Nov 30 07:29:29 PST 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 9e8a71caf02a503006eb08b5cd291adeaa20a9c2
https://github.com/llvm/llvm-project/commit/9e8a71caf02a503006eb08b5cd291adeaa20a9c2
Author: David Green <david.green at arm.com>
Date: 2021-11-30 (Tue, 30 Nov 2021)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/AArch64/fpclamptosat.ll
M llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
M llvm/test/CodeGen/ARM/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/Thumb2/mve-fpclamptosat_vec.ll
M llvm/test/CodeGen/WebAssembly/fpclamptosat.ll
M llvm/test/CodeGen/WebAssembly/fpclamptosat_vec.ll
M llvm/test/CodeGen/X86/fpclamptosat.ll
Log Message:
-----------
[DAG] Create fptosi.sat from clamped fptosi
This adds a fold in DAGCombine to create fptosi_sat from sequences for
smin(smax(fptosi(x))) nodes, where the min/max saturate the output of
the fp convert to a specific bitwidth (say INT_MIN and INT_MAX). Because
it is dealing with smin(/smax) in DAG they may currently be ISD::SMIN,
ISD::SETCC/ISD::SELECT, ISD::VSELECT or ISD::SELECT_CC nodes which need
to be handled similarly.
A shouldConvertFpToSat method was added to control when converting may
be profitable. The original fptosi will have a less strict semantics
than the fptosisat, with less values that need to produce defined
behaviour.
This especially helps on ARM/AArch64 where the vcvt instructions
naturally saturate the result.
Differential Revision: https://reviews.llvm.org/D111976
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