[all-commits] [llvm/llvm-project] b0c742: [RISCV] Emit DWARF location expression for RVV sta...

[Kai Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b0c742152489c55ca5976a8f25538e88e224a7d2
      https://github.com/llvm/llvm-project/commit/b0c742152489c55ca5976a8f25538e88e224a7d2
  Author: Hsiangkai Wang <kai.wang at sifive.com>
  Date:   2021-11-27 (Sat, 27 Nov 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
    M llvm/lib/Target/RISCV/RISCVSystemOperands.td
    A llvm/test/CodeGen/RISCV/rvv/debug-info-rvv-dbg-value.mir

  Log Message:
  -----------
  [RISCV] Emit DWARF location expression for RVV stack objects.

VLENB is the length of a vector register in bytes. We use
<vscale x 64 bits> to represent one vector register. The dwarf offset is
VLENB * scalable_offset / 8.

For the mask vector, it occupies one vector register.

Differential Revision: https://reviews.llvm.org/D107432