[all-commits] [llvm/llvm-project] e20391: [LoopVectorize] When tail-folding, don't always pr...

[david-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e20391fc5d6a72e712449142e803fb81b8a75153
      https://github.com/llvm/llvm-project/commit/e20391fc5d6a72e712449142e803fb81b8a75153
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2021-11-26 (Fri, 26 Nov 2021)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll

  Log Message:
  -----------
  [LoopVectorize] When tail-folding, don't always predicate uniform loads

In VPRecipeBuilder::handleReplication if we believe the instruction
is predicated we then proceed to create new VP region blocks even
when the load is uniform and only predicated due to tail-folding.

I have updated isPredicatedInst to avoid treating a uniform load as
predicated when tail-folding, which means we can do a single scalar
load and a vector splat of the value.

Tests added here:

  Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll

Differential Revision: https://reviews.llvm.org/D112552